Many known power-on-reset circuits have limitations that can reduce the effectiveness of these power-on-reset circuits in monitoring a power supply voltage for a target circuit. Some known power-on-reset circuits may not assert a power-on-reset signal with rising and/or falling power supply voltage ramps in a desirable fashion. Also, some known power-on-reset circuits may not monitor the power supply voltages at discrete threshold voltages and will instead deassert a power-on-reset signal after a specified period of time has elapsed regardless of the power voltage supply level. In such power-on-reset circuits, if the power supply voltage rises at a relatively slow rate, the power-on-reset circuit and target circuit may not operate in a desirable fashion. Some known power-on-reset circuits also may not assert a power-on-reset signal reset in a reliable fashion when the power supply voltage cycles at a relatively high rate, and/or is noisy. Thus, a need exists for systems, methods, and apparatus to address the shortfalls of present technology and to provide other new and innovative features.